Articles — Two-column

Articles tagged Two-column

Show all Articles

Ley de Ohm
Ley de Ohm
En este informe se presenta detalladamente el desarrollo de la primera practica de laboratorio, en la cual encontramos la ley de ohm y sus aplicaciones en los circuitos en paralelo y en serie, teniendo en cuenta las normas de laboratorio para así lograr la correcta finalización de dicha guía.
camilo cardenas
Avance Proyecto Integrador 2018B
Avance Proyecto Integrador 2018B
Avance previo de un proyecto para la universidad.
Javier García
How to Reduce Jetlag by Innovative Cabin Lighting
How to Reduce Jetlag by Innovative Cabin Lighting
The purpose of this paper is to examine how chronobiologically effective cabin lighting increases comfort and well-being for passengers on long-haul flights.
Achim LEDER, Dr.
Aplicação do Comando Numérico Computadorizado na Otimização em Prototipagem de Placa de Circuito Impresso
Aplicação do Comando Numérico Computadorizado na Otimização em Prototipagem de Placa de Circuito Impresso
Com a evolução constante da eletrônica, a necessidade de produzir protótipos em placa de circuito impresso é cada vez mais cobrada e importante para se elaborar tecnologia de forma rápida, mas sem deixar a qualidade de produção baixa. Pensando nisso, este artigo propõe o desenvolvimento de uma fresadora CNC com base no comando numérico computadorizado para a confecção de trilhas na placa de circuito impresso de forma otimizada. Deste modo, são mostrados passo a passo os pilares teóricos que compõem a base de conhecimento para que se possa entender e desenvolver a ferramenta que irá usinar e por sua vez produzir o protótipo de forma eficaz. Os resultados obtidos em relação à montagem da ferramenta e o material usinado foi classificado com satisfatório, já que a máquina CNC conseguiu atingir seus objetivos, perfurando, cortando a placa e isolando as trilhas formando assim o circuito.
José Gleury Galvino Pereira e Adriana Maria Rebouças do Nascimento
Conservative Wasserstein Training for Pose Estimation
Conservative Wasserstein Training for Pose Estimation
Paper presented at ICCV 2019. This paper targets the task with discrete and periodic class labels (e.g., pose/orientation estimation) in the context of deep learning. The commonly used cross-entropy or regression loss is not well matched to this problem as they ignore the periodic nature of the labels and the class similarity, or assume labels are continuous value. We propose to incorporate inter-class correlations in a Wasserstein training framework by pre-defining (i.e., using arc length of a circle) or adaptively learning the ground metric. We extend the ground metric as a linear, convex or concave increasing function w.r.t. arc length from an optimization perspective. We also propose to construct the conservative target labels which model the inlier and outlier noises using a wrapped unimodal-uniform mixture distribution. Unlike the one-hot setting, the conservative label makes the computation of Wasserstein distance more challenging. We systematically conclude the practical closed-form solution of Wasserstein distance for pose data with either one-hot or conservative target label. We evaluate our method on head, body, vehicle and 3D object pose benchmarks with exhaustive ablation studies. The Wasserstein loss obtaining superior performance over the current methods, especially using convex mapping function for ground metric, conservative label, and closed-form solution.
Xiaofeng Liu, Yang Zou, Tong Che, Peng Ding, Ping Jia, Jane You, B.V.K. Vijaya Kumar
Denver Crime Data
Denver Crime Data
Encontrar las características, de los diferentes tipos de de agresión registrados desde el 1 de enero de 2015 hasta septiembre de 2018, el en la ciudad de Denver.
Jorge Sarmientos, Carlos Mendez, Juan Bonilla
Performance Time Report
Performance Time Report
A performance time evaluation between a C lexer and a Lex generated lexer.
Carmina Pérez Guerrero
Design a NMOS and PMOS transistor circuit using virtuoso cadence and plot I-V characteristics of PMOS and NMOS for different gate and drain voltages
Design a NMOS and PMOS transistor circuit using virtuoso cadence and plot I-V characteristics of PMOS and NMOS for different gate and drain voltages
In this project we simulate NMOS and PMOS transistor circuit in cadence virtusso tool and the I/V characteristics of PMOS and NMOS are observed
chaitanya
Laboratory 4 (LEX vs C)
Laboratory 4 (LEX vs C)
Laboratory where LEX is compared to C
Jorge Adrian Padilla Velasco

Related Tags

PortugueseRésumé / CVHandoutInternational LanguagesMathUniversityHomework AssignmentAlgorithmBiberBibLaTeXConference PaperElectronicsPhysicsSource Code ListingFrenchPortuguese (Brazilian)Getting StartedEssaySpanishGermanLuaLaTeXGeophysicsAcademic JournalThesisProject / Lab ReportKoreanNorwegianF1000ResearchXeLaTeXArabicSociety of Exploration GeophysicistsSEGTeXReykjavík UniversityUniversidad Nacional Autónoma de MéxicoUniversidad de Costa RicaJapaneseIEEE Official TemplatesIEEE (all)IEEE Community Templates and ExamplesSIGCHIUniversidade Federal do Rio Grande do SulVietnameseChineseUniversidade de LisboaUniversidad Autónoma de OccidenteAssociation for Computational LinguisticsUniversity of PortoResearch ProposalLecture NotesDutchTechnical ManualCERNSAGE PublicationsHumanitiesUniversity of California, DavisDictionaryDirect Submission LinkEurographicsbioRxivRoyal Meteorological Society (RMetS)Senter for klinisk dokumentasjon og evaluering (SKDE)F1000Research - Official TemplatesAssociation for Computing Machinery (ACM) - Official Sample PapersAssociation for Computing Machinery (ACM) - Official Master TemplatesVrije Universiteit Brussel (VUB)PreprintsAveiro UniversitySoftware EngineeringUniversidad Nacional de San AgustínInstituto Nacional de Telecomunicações (INATEL)